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Arista Channels

FPGA Design Engineer - Poland

Reposted 9 Days Ago
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Remote
Hiring Remotely in Poland
Senior level
Remote
Hiring Remotely in Poland
Senior level
The FPGA Design Engineer will design, implement, and test FPGA-based digital systems, collaborating with teams to develop and optimize networking solutions.
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Company Description

Arista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. What sets us apart is our relentless pursuit of innovation. We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world. Our solutions are designed to not only meet the current demands of the digital landscape but to also anticipate and adapt to future challenges.

At Arista we value the diversity of thought and perspectives that each employee brings to the table. We believe that fostering an inclusive environment, where individuals from various backgrounds and experiences feel welcome, is essential for driving creativity and innovation.

Our commitment to excellence has earned us several prestigious awards, such as Best Engineering Team, Best Company for Diversity, Compensation, and Work-Life Balance. At Arista, we take pride in our track record of success and strive to maintain the highest standards of quality and performance in everything we do.

Job Description

Who You’ll Work With

We are seeking skilled and motivated individuals to join our FPGA development team. The successful candidate will be responsible for the design, implementation, verification, and testing of FPGA-based digital systems used in cutting-edge networking products. You will collaborate with cross-functional teams including hardware, software, and customer engineering to develop quality, innovative and reliable solutions, which are deployed in an extremely diverse range of industries.

What You’ll Do

  • Design and implement digital logic using VHDL for FPGAs.
  • Develop and optimise high-speed, low-latency FPGA designs targeting AMD/Xilinx Ultrascale Plus devices.
  • Integrate FPGA modules with embedded systems, processors, and high-speed interfaces (e.g., PCIe, Ethernet, HBM, DDR4, AXI)
  • Perform functional simulation, synthesis, place-and-route, timing analysis, and optimization using industry-standard EDA tools (e.g. Vivado, ModelSim).
  • Leverage industry-standard development tools and workflows to manage work, code changes, testing and integration (e.g. Jira, Git, CI/CD).
  • Create and maintain both internal and customer facing documentation including design specifications, test plans, and user guides.
  • Work closely with hardware, software and account teams to define technical requirements and business needs.
  • Support platform bring-up, validation, and debugging in the lab using test equipment such as oscilloscopes, logic analyzers, and JTAG tools.
  • Contribute to continuous improvement of FPGA development processes, methodologies and design practices.

Qualifications

Required:

  • Bachelor’s or higher degree in Electrical Engineering, Computer Engineering, or related field.
  • 5+ years of experience in FPGA or ASIC design and development.
  • Proficiency in a hardware description language (HDL) such as VHDL or Verilog.
  • Experience with FPGA development tools (Vivado, Quartus, etc.).
  • Strong understanding of digital logic, high-speed design, and timing closure.
  • Candidates must be based in Poland.
  • Please clearly state your current work authorization status in your application.

Preferred:

  • Familiarity with scripting languages (Tcl, Python, etc.) for automation.
  • Knowledge of version control systems (e.g., Git).
  • Knowledge of Ethernet, and OSI layer model.

Competencies:

  • Strong analytical and problem-solving skills.
  • Effective communication and collaboration in cross-disciplinary teams.
  • Self-motivated with a strong attention to detail and a commitment to quality.
  • Ability to manage multiple tasks and meet project deadlines.

#LI-SZ1

Top Skills

Axi
Ci/Cd
Ddr4
Ethernet
Git
Hbm
JIRA
Pcie
Quartus
Verilog
Vhdl
Vivado

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